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Tamper Detection

A latch that survives the power cycle

Active mesh and environmental monitors feed a persistent suspect-tamper state. Keys zeroise; return to service needs authenticated remediation.

Architecture defined Pre-silicon
Status
Architecture defined
Mesh
Driven and response-monitored
Monitored
Supply, clock, temperature, enclosure, magnetic
Tamper state
Persists across power cycles
Response
Key zeroisation, authenticated remediation

Design targets · not measured silicon results

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Trust domain Trusted compute
Nelix trusted compute domain Floorplan with four nested planes: board domain, package, die, and a central trust island for device identity, measurement and signing. Compute, memory, sensor I/O, metrology, crypto and telemetry route into a ring bus. Only signed data leaves through an attestation export port. Board domain Package Die Die extent Package extent Compute Bounded array Memory Measured store I/O phy Sensor ingress Metrology Sense & sample Crypto Sign & seal Telemetry Signed export Ring bus Trust island Root of trust Key slots Identity · measure · sign Port signed Attestation export Nothing else crosses
  • Trust boundary
  • Supporting logic
  • Signed data in flight
Tamper Detection · labelled architecture
Infrastructure equipment in the field conditions this mechanism is designed for
Field condition the mechanism is specified against
PROBLEM

Detection a reset can clear is not detection

Probing, glitching and fault injection do not open a lid. If the tamper flag is volatile or rewriteable, removing power erases the event and the device returns to service clean.

While running Runtime verification
Continuous runtime verification A conceptual die floorplan for continuous measurement. An always-on measurement engine occupies the left of the die, with a four-phase cycle beneath it: sample, hash, extend, compare. To its right a recessive band shows workload activity in three lanes of uneven task footprints. A sample bus runs under the band and a comb of taps drops from it into a digest chain of linked cells, one per epoch, which the light extends from left to right. One epoch is flagged and re-measured. Beneath the chain the measured history stacks downward in rows that fade as they age, and the chain has no entry from its left end, so the record can only be extended and never rewound. Fresh evidence leaves through a port on the right edge. Operating die · power on Measure engine Always on Sampler Hash macro Every epoch not only at boot Sample Hash Extend Compare Workload activity L0 L1 L2 Sample bus Rolling digest E0 E1 E2 E3 E4 E5 E6 No rewind Re-measure Measured history E6 E5 E4 E3 Fresh quote Measurement continues for as long as the device runs
  • Measured epoch
  • Flagged for re-measure
  • Light = the digest being extended
Boot-time proof goes stale, so measurement continues while the device works and the evidence an operator asks for is always current.
Sense the surface, then latch the consequence · design intent
APPROACH

Sense the surface, then latch the consequence

A driven mesh plus supply, clock and temperature monitors catch physical attack paths. On fire, state latches in the trust domain, keys zeroise, and only authenticated remediation restores service.

Semiconductor die macro
Semiconductor die macro
PROPERTIES

What follows from the diagram

  1. Active mesh

    Cut, short or reroute changes a measured response

  2. Environmental monitors

    Glitch and fault injection appear as out-of-envelope events

  3. Persistent state

    Tamper survives power loss in the trust domain

  4. Zeroise + remediate

    Keys die on detection; reboot alone cannot clear it

Engage

Reviewing this mechanism?

The specification can still change. That stops being true after tape-out.

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