Security-hardened silicon for African infrastructure
We design microcontrollers and hardware security IP purpose-built for utility metering, critical systems, and national platforms.
Core Technologies
FPGA InferEdge™ Edge
Purpose-designed AI inference accelerator for edge deployment. 64×64 systolic array with SRAM compute-in-memory, optimized for INT8/INT4 workloads at 15–25W.
Edge AI, Low Power, Intermittent Ready, Energy-Aware, AI InferenceFPGA SecureGrid™
Security-hardened smart metering SoC for utility-grade grid infrastructure. PUF-based hardware root of trust with encrypted measurement, tamper detection, and over-the-air secure updates.
Grid Security, PUF Root of Trust, Anti-Tamper, Utility-Grade, InfrastructureFPGA InferCloud™ Cloud
High-throughput AI inference accelerator for data center and cloud-connected deployment. Scaled compute architecture targeting rack-density inference workloads with TrustCore attestation for multi-tenant security.
Cloud AI, High Throughput, Multi-Tenant, TrustCore, Scalable ComputeSecurity begins at the silicon layer
Software-only security fails in physical environments. Firmware can be modified, memory can be read, and stored keys can be extracted. Across sub-Saharan Africa, field-deployed infrastructure operates in adversarial physical environments where attackers have commodity tools and physical access.
Nelix embeds security directly into silicon. TrustCore establishes a hardware root of trust where cryptographic keys are generated from physically unclonable functions, not stored in addressable memory. Secure boot, hardware isolation, and multi-vector tamper detection with sub-200 ns response ensure that critical operations cannot be bypassed, even with physical access to the device.
This architecture secures both infrastructure and compute. SecureGrid™ protects energy systems at the metering point. InferEdge™ enables trusted AI inference at the edge, across clinics, farms, vehicles, and grid equipment.
GridGuard NL-100 technical overview
High-level block diagram
Block diagram of the Nelix security-hardened microcontroller architecture.
Physical Unclonable Functions
Every chip we produce has a unique, unclonable identity derived from nanoscale manufacturing variations — a silicon fingerprint.
Silicon Variation
Nanoscale manufacturing variations create unique electrical characteristics in every chip — even chips from the same wafer.
Challenge-Response
The PUF engine generates cryptographic keys from physical properties. No keys stored in memory — nothing to extract.
Device Authentication
Each device proves its identity through its unique silicon fingerprint. Cloned or counterfeit devices are detected instantly.
Tamper Evidence
Physical attacks alter the silicon structure, destroying the PUF response. Any tampering is self-evidencing.
Detailed technical overview
Preliminary specifications subject to revision. Contact us for the latest datasheet.
How we work
Specification
We work with you to define technical requirements, security needs, and integration constraints for your application.
Design & Validation
Custom architecture development, FPGA prototyping, and rigorous testing before committing to silicon.
Production & Support
Foundry manufacturing, quality assurance, integration support, and ongoing partnership.
Ready to talk architecture?
Our engineering team is ready to discuss your security requirements.