The silicon foundation for Africa's AI future
We design AI accelerators and security-hardened chips for the data centers, edge devices, and national infrastructure powering Africa's compute sovereignty.
Core Technologies
InferEdge™ Edge AI Accelerator (FPGA PROTOTYPE)
Purpose-designed AI inference accelerator for edge deployment. 64×64 systolic array with SRAM compute-in-memory, optimized for INT8/INT4 workloads at 15–25W.
Edge AI, Low Power, Intermittent Ready, Energy-Aware, AI InferenceSecureGrid™ Smart Metering SoC
Security-hardened smart metering SoC for utility-grade grid infrastructure. PUF-based hardware root of trust with encrypted measurement, tamper detection, and over-the-air secure updates.
Grid Security, PUF Root of Trust, Anti-Tamper, Utility-Grade, InfrastructureInferCloud™ Cloud AI Accelerator (FPGA PROTOTYPE)
High-throughput AI inference accelerator for data center and cloud-connected deployment. Scaled compute architecture targeting rack-density inference workloads with TrustCore attestation for multi-tenant security.
Cloud AI, High Throughput, Multi-Tenant, TrustCore, Scalable ComputeSecurity begins at the silicon layer
Software runs on chips. Trust runs on chips. AI runs on chips.
Without indigenous silicon, every layer above (applications, models, security, identity) depends on hardware designed by someone else, somewhere else.
Nelix designs at the silicon layer. Our chips combine AI compute, hardware security, and architectural choices made for African deployment realities: extreme heat, intermittent power, contested networks. The result is a silicon foundation national infrastructure can be built on with confidence.
InferEdge™ delivers AI inference at the edge. SecureGrid™ secures grid and metering systems. InferCloud™ powers data-center workloads. Each product shares a common substrate: indigenous, sovereign, hardened silicon designed for the continent it serves.
From RTL to Silicon
ARCHITECTURE
Silicon specifications informed by African deployment realities: high heat, intermittent power, contested networks. Process-node selection, IP block definition.
RTL & VERIFICATION
SystemVerilog design. Simulation, formal verification, coverage closure. Industry-standard EDA toolchain.
FPGA PROTOTYPE
Real-workload benchmarking.
TAPE-OUT & FABRICATION
Place-and-route, sign-off, foundry submission.
CERTIFICATION & DEPLOYMENT
Hardware security certification, characterization, field deployment with launch partners across the continent.
Ready to talk architecture?
Our engineering team is ready to discuss your security requirements.