Long-term platform work driven by the research gap. Production silicon is not shipping.
Named product lines under the AI-accelerators umbrella. Each page carries an honest stage label.
Trust, attestation and power-resilience IP that the platforms are built on.
Evaluation paths and documentation for architecture validation before any tape-out.
Metering, grid-edge hosts and utility operations under intermittent power and connectivity.
Control, gateways and remote monitoring for infrastructure that cannot assume a reliable cloud path.
Trusted compute and identity for sovereign and public-sector programmes. Design intent, not deployed claims.
Additional sector pages for telecom, edge AI and secure embedded contexts.
Hardware-rooted identity, measured boot and attestation topics. Status labelled on each page.
Power interruption and local inference as architectural inputs, not exception handlers.
FPGA and ASIC pathways plus research programmes with clear stage labels.
Architecture through RTL, FPGA and SoC integration — commercial delivery today.
Verification closure, security architecture and embedded bring-up under milestone reviews.
How to engage Nelix on a scoped design programme.
Proposed institutional collaboration — not a claim of signed agreements.
Training and research routes that feed Africa's semiconductor talent pipeline.
Supervised placements and the talent-to-employment path.
Categories only. Logos appear only with verified written permission.
Hubs publish only real documents and posts. Empty hubs say so.
Programme updates and developer paths when content lands.
Accra-based fabless design house. Pre-silicon programme stage stays explicit.
Named collaborations where disclosable, plus seven open-to categories of relationship — each stated as what Nelix brings and what it is looking for.
FPGA development board
Relationships Nelix can name with written agreement. Capacity-building collaborations appear here; open-to categories below are not claimed partnerships.
Collaboration
Collaboration with Nelix for capacity building in Africa — strengthening semiconductor skills and institutional readiness through joint programme work.
Named collaborationOpen-to categories are not claimed relationships. Named collaborations appear only when disclosable with written agreement. No third-party logo graphics appear without that agreement. Pre-silicon: architecture defined, RTL in progress, FPGA validation next.
Seven categories of relationship. Each card states what the category covers. Details for what Nelix brings and what it is looking for follow below.
Curriculum collaboration, supervised placements and joint research.
Talent & academia programmeTooling for design, verification and physical implementation.
Discuss tooling collaborationProcess technology, PDK access and the route to a tape-out.
Discuss foundry engagementSovereign capability, standards input and public infrastructure deployment.
Contact the teamField conditions, pilot sites and requirements that come from operations.
Energy & utilities solutionsOEMs and integrators building the equipment the silicon goes into.
Design servicesCapital for a hardware programme with a services business alongside it.
Contact the teamOpen-to framing only. Nothing here claims a current commercial relationship.
Curriculum collaboration, supervised placements and joint research.
Tooling for design, verification and physical implementation.
Process technology, PDK access and the route to a tape-out.
Sovereign capability, standards input and public infrastructure deployment.
Field conditions, pilot sites and requirements that come from operations.
OEMs and integrators building the equipment the silicon goes into.
Capital for a hardware programme with a services business alongside it.
Partners are named only with written agreement, so the first step is a conversation rather than an announcement.
