Partnerships

Partner with Nelix on attested inference silicon

We work with design partners, OEMs, infrastructure operators, and the foundry & IP ecosystem to take Attested Infrastructure Inference from FPGA validation to deployed, proof-carrying fleets — InferEdge™ JBIA, SecureGrid™, and the TrustCore™ Trust Continuum, engineered in Accra for real field-deployment conditions.

01 — How We Partner

Four ways to build with us

FPGA Evaluation Access

Design partners evaluate SecureGrid™ and InferEdge™ on FPGA under NDA — exercising the full Attested Infrastructure Inference path before silicon exists: JBIA inference, ICSM completion, and PCI export.

FPGA eval · under NDA JBIA · ICSM · PCI Direct RTL engineer access

Co-Development

OEMs and system integrators co-design Nelix silicon into products — InferEdge™ reference designs, SDK preview builds, and roadmap influence on the AII specification ahead of tape-out.

Design partner program SDK preview builds Priority first-silicon allocation

Fleet Deployment

Utilities and infrastructure operators pilot and scale attested fleets on the Nelix Compute Platform — Proof-Carrying Fleet Operations from meter endpoint to control plane, resilient through intermittent power.

Proof-Carrying Fleet Ops Attestation → fleet admit Signed OTA · offline PCI queue

Silicon Roadmap & IP

Foundry, OSAT, IP and EDA partners — and investors — back the FPGA validation → first-silicon path, with InferEdge™ and TrustCore™ IP available to license from first silicon onward.

Foundry · OSAT · IP/EDA InferEdge · TrustCore IP FPGA validation → first silicon
02 — How We Engage

From evaluation to deployed fleet

Every engagement follows the same disciplined path: prove the AII architecture on your terms under NDA, pilot it on your infrastructure, then scale through supply or IP licensing agreements.

01

Evaluation

Under NDA: architecture and security-model briefings, plus FPGA evaluation of SecureGrid™ and InferEdge™ — exercising JBIA inference, ICSM completion, and PCI export before silicon, with direct access to the engineers writing the RTL.

02

Pilot

A scoped pilot on your infrastructure with FPGA evaluation units, integration against your head-end or control systems, and Proof-Carrying Fleet Operations validated against jointly-agreed success criteria.

03

Deployment & Licensing

Volume supply and IP licensing from first silicon onward — fleet attestation, signed OTA, and offline PCI queueing through the Nelix Compute Platform.

03 — Where We Are

Partnership Impact

Nelix is pre-silicon, with SecureGrid first tape-out targeted for 2029. An honest snapshot of our current development stage.

MET-01
PUF
Hardware Root of Trust
01
MET-02 Target milestone
2029
First Tape-Out
02
MET-03
FPGA
Validation Platform Today
03
Lifecycle
Architecture FPGA validation Tape-out 2029 Pilot deploy
04 — Supply Chain & IP

A supply chain you can audit

Attested Infrastructure Inference starts at the silicon boundary — so critical infrastructure deserves to know where its silicon comes from. This is the lifecycle we are building: designed by Nelix, fabricated and packaged at established partners, provisioned and deployed under a verifiable chain of custody through the TrustCore™ Trust Continuum.

01
Architecture & RTL
Designed by Nelix engineering, Accra
02
Verification
Simulation & FPGA validation
03
Fabrication
Tape-out at partner foundry
04
Packaging & Test
OSAT partner facility
05
Deployment
Identity provisioning & field integration
InferEdge™ Accelerator IP

JBIA inference IP

Joule-Bounded Inference Architecture — an INT8 / INT4 systolic engine with on-chip SRAM compute-in-memory, ICSM completion under Energy Contract, and PCI export, in a sub-15 W envelope. Available for licensing from first silicon onward.

TrustCore™ Trust Continuum IP

Hardware root of trust IP

PUF-derived identity, measured boot, attestation bundles, and PCI signing at the export boundary — the Trust Continuum designed into partner SoCs, targeting NIST and PSA Certified evaluation paths. Available for licensing from first silicon onward.

05 — Get Started

Partnership inquiry

What partners get

  • Direct access to Nelix engineering and leadership
  • Design influence on the AII roadmap and specification
  • Early access to RTL, FPGA bitstreams, and SDK builds
  • Priority allocation at first silicon
  • Joint communications where appropriate
  • Long-term strategic supply relationship
Response time: we typically respond within 48 hours and route your inquiry to the right person directly.
Partnership Inquiry Routing enabled

Briefly describe your organization, your interest, and your timeline.

Direct Line

Prefer to talk directly?

Email partnerships@nelix.io and we’ll route your inquiry to the right person within 48 hours.